module cortex_m0(
    input  wire          XTAL1, // input
    output wire          XTAL2, // output
    input  wire          NRST,  // active low reset

    input  wire          nTRST,
    input  wire          TDI,
    output wire          TDO,
    inout  wire          SWDIOTMS,
    input  wire          SWCLKTCK,
	 inout  wire          uart0_RX,
	 inout  wire          uart0_TX
);

parameter BE              = 0;   // Big or little endian
parameter BKPT            = 4;   // Number of breakpoint comparators
parameter DBG             = 1;   // Debug configuration
parameter NUMIRQ          = 32;  // NUM of IRQ
parameter SMUL            = 0;   // Multiplier configuration
parameter SYST            = 1;   // SysTick
parameter WIC             = 0;   // Wake-up interrupt controller support
parameter WICLINES        = 34;  // Supported WIC lines
parameter WPT             = 2;    // Number of DWT comparators
    

    wire clk_out;

    xtal 
      clk(
        .inclk0         (XTAL1),
        .c0             (clk_out)
      );

    cmsdk_mcu
      #(
        .BE             (BE),
        .BKPT           (BKPT),
        .DBG            (DBG),
        .NUMIRQ         (NUMIRQ),
        .SMUL           (SMUL),
        .SYST           (SYST),
        .WIC            (WIC),
        .WICLINES       (WICLINES),
        .WPT            (WPT)
      )
      core
      (
        .XTAL1          (clk_out),
        .XTAL2          (XTAL2),
        .NRST           (NRST),
        .nTRST          (nTRST),
        .TDI            (TDI),
        .TDO            (TDO),
		  .uart0_RX			(uart0_RX),
		  .uart0_TX			(uart0_TX),
        .SWDIOTMS       (SWDIOTMS),
        .SWCLKTCK       (SWCLKTCK)
      );

endmodule